By Topic

LPCVD silicon nitride uniformity improvement using adaptive real-time temperature control

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
J. Gumpher ; Tokyo Electron America Inc., Richardson, TX, USA ; W. A. Bather ; D. Wedel

An effective approach to improve silicon nitride thickness uniformity has been demonstrated on a batch LPCVD furnace platform. Implementation of adaptive real-time temperature control provides accurate, real-time estimation of substrate temperature profiles that enables model-based optimization of process temperature. Optimization of a 200-nm silicon nitride deposition yielded long-term, overall nitride thickness uniformity of 0.79% 1σ over a seven-week period, compared to 1.24% for an equivalent PID-tuned process. Three sequential silicon nitride deposition iterations were implemented in the process recipe to enable increased temperature ramp rates for more efficient optimization of within-wafer uniformity. The optimized process requalified quickly after major and minor equipment maintenance, and is suitable for use in a manufacturing environment. The ART-optimized temperature ramp intervals used in this study are comparable to temperature deltas often used to offset dichlorosilane depletion effects encountered in some large-batch vertical furnace depositions. SIMS depth profiling of ART-optimized silicon nitride does reveal small oxygen and chlorine peaks, indicating slight interface formation between deposition steps.

Published in:

IEEE Transactions on Semiconductor Manufacturing  (Volume:16 ,  Issue: 1 )