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Topology for hybrid multilevel inverter

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2 Author(s)
Lai, Y.S. ; Dept. of Electr. Eng., Nat. Taipei Univ. of Technol., Taiwan ; Shyu, F.-S.

A new topology for a hybrid multilevel inverter is presented, which significantly increases the level number of the output waveform and thereby dramatically reduces the low-order harmonics and total harmonic distortion. To the best of the authors' knowledge, the presented topology has the greatest level number for a given number of stages. Moreover, the stage with higher DC link voltage has lower switching frequency; and thereby reduces the switching losses. Comparison of the results of various multilevel inverters is investigated to reflect the merits of the presented topology. The details of the PWM control using the harmonic elimination technique for the hybrid inverter are presented and confirmed by both simulation and experimental results.

Published in:

Electric Power Applications, IEE Proceedings -  (Volume:149 ,  Issue: 6 )