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Computing with phase locked loops: choosing gains and delays

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3 Author(s)
Piqueira, J.R.C. ; Dept. de Engenharia de Telecomunicoes e Controle, Univ. de Sao Paulo, Brazil ; Orsatti, F.M. ; Monteiro, L.H.A.

We simulate a four-node fully connected phase-locked loop (PLL) network with an architecture similar to the neural network proposed by Hoppensteadt and Izhikevich (1999, 2000), using second-order PLLs. The idea is to complement their work analyzing some engineering questions like:how the individual gain of the nodes affects the synchronous state of whole network; how the individual gain of the nodes affects the acquisition time of the whole network; how close the free-running frequencies of the nodes need to be in order to the network be able to acquire the synchronous state; how the delays between nodes affect the synchronous state frequency. The computational results show that the Hoppensteadt-Izhikevich network is robust to the variation of these parameters and their effects are described through graphics showing the dependence of the synchronous state frequency and acquisition time with gains, free-running frequencies, and delays.

Published in:

Neural Networks, IEEE Transactions on  (Volume:14 ,  Issue: 1 )

Date of Publication:

Jan 2003

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