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A high performance 0.18 /spl mu/m CMOS image sensor technology is reported in this paper. It is modified from a generic logic technology. A 64/spl times/64 3T pixel array of various pixel size from 2.8 /spl mu/m to 4.0 /spl mu/m is used to study the scale down issues. By optimizing the process flow, the image sensors with the pixel size downscaled to 2.8 /spl mu/m demonstrates the high sensitivity, low dark current, low white pixel rate and high dynamic range. Although the crosstalk effect is getting worse for smaller pixel size, the 3 /spl mu/m pixel array demonstrates an excellent color rendition capability.