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90 nm generation Cu/CVD low-k (k < 2.5) interconnect technology

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9 Author(s)
Bao, T.I. ; Taiwan Semicond. Manuf. Co., Hsin-Chu, Taiwan ; Ko, C.C. ; Song, J.Y. ; Li, L.P.
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Eight level Cu/CVD low-k (k<2.5) + one top level Cu/USG 90 nm multilevel interconnection with 0.12/0.12 /spl mu/m for line width/space and 0.13 /spl mu/m for via has been demonstrated for the first time using 193 nm lithography with OPC developed for TSMC 200 mm/300 mm technologies. The 8-level Cu/CVD low-k dual damascenes were constructed by nitrogen-free dielectric layers without middle trench etch stop to achieve keff=2.6. No film delamination was found by film and CMP optimization. Electrical results showed that excellent and thermally stable metal-line Rs and via-chain Rc yields from iso or dense Cu areas and 1M via chains were obtained.

Published in:

Electron Devices Meeting, 2002. IEDM '02. International

Date of Conference:

8-11 Dec. 2002