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Investigation of realistic dopant fluctuation induced device characteristics variation for sub-100 nm CMOS by using atomistic 3D process/device simulator

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3 Author(s)
T. Ezaki ; Silicon Syst. Res. Labs., NEC Corp., Sagamihara, Japan ; T. Ikezawa ; M. Hane

We have investigated device characteristics fluctuations of deep sub-100 nm CMOS devices induced by the statistical nature of the number and position of discrete dopant atoms by using newly developed three dimensional atomistic device simulator coupled with realistic atomistic process simulator. The gate length dependence of threshold voltage and drain current fluctuations for both p- and n-MOSFETs has been calculated. Coupling of the atomistic process and device simulations enables us to perform sensitivity analysis of the threshold voltage fluctuation in terms of independent dopant contribution, such as that of the dopant in the source/drain or channel region.

Published in:

Electron Devices Meeting, 2002. IEDM '02. International

Date of Conference:

8-11 Dec. 2002