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We discuss several device structures suitable for scaling CMOS devices well into the nano-CMOS era, perhaps down below 10 nm physical gate length. The ultra-thin body MOSFET device structure has many features in common with today's bulk MOSFET, which makes it easier for industry to introduce into manufacturing. On the other hand, the double-gate structure as represented by the FinFET appears to offer greater scalability down to 10 nm gate length or perhaps even below. While a number of significant challenges remain to be overcome, including device parasitics, interfaces, and threshold voltage control techniques, it appears that the continued evolution of CMOS integrated circuit technology into this regime will not be impeded by basic limitations of the underlying transistor technology. The implication of this is that "Moore's law" may continue for yet another 15-20 years before the ultimate device limits for CMOS are reached.