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WATSON: design space boundary exploration and model generation for analog and RFIC design

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2 Author(s)
De Smedt, B. ; ESAT-MICAS Lab., Katholieke Universiteit Leuven, Belgium ; Gielen, G.G.E.

A new method is described which gives the designer access to the design space boundaries of a circuit topology, all with transistor-level accuracy. Using multiobjective genetic optimization, the hypersurface of Pareto-optimal design points is calculated. Tradeoff analysis of competing performances at the design space boundaries is made possible by the application of multivariate regression techniques. This new methodology is illustrated with the presentation of the design space for two different types of circuits: a Miller-compensated operational transconductance amplifier and an LC-tank voltage-controlled oscillator.

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:22 ,  Issue: 2 )

Date of Publication:

Feb. 2003

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