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Implementation of state-space digital filter structures using block floating-point arithmetic

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1 Author(s)
S. Sridharan ; Queensland Institute of Technology, Brisbane, Australia

Block floating-point arithmetic is considered as an alternative to fixed-point and floating-point arithmetic in the implementation of recursive digital filters. Block floating-point implementation of state-space digital structures is shown to have improved signal-to-noise ratio compared to fixed-point implementation and can be designed to be free of overflow. It is shown that the filter cannot support zero input limit cycle oscillations of period higher than one. An architecture suitable for the VLSI implementation of a block floating point co-processor is described.

Published in:

Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '87.  (Volume:12 )

Date of Conference:

Apr 1987