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Construction methods and performance evaluation for image processing systems with ISP LSIs

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4 Author(s)
Fukushima, T. ; Hitachi Research Laboratory, Ibaraki, Japan ; Kobayashi, Y. ; Kashioka, Seiji ; Asada, K.

We have developed an LSI, an Image Signal Processor (ISP), especially suited to process image signals of either binary or gray scale. The ISP belongs to the category of partially parallel processing devices and possesses four processor elements (PEs) which operate in parallel. There are two image system construction methods with ISPs. One is the PE adding method, with which four ISPs make up a system which performs a 4 × 4 spatial convolution on a gray-scale image and two ISPs compose one which accomplishes an 8 × 8 template pattern matching on a binary image. These take 10.9 ms onto a 256 × 256 picture. The other method is the PE saving approach, with which four ISPs build up a system which executes an 8 × 8 spatial convolution on a gray-scale image and eight ISPs yield one which carries out a 32 × 32 template pattern matching on a binary image. These need 43.7 ms onto a 256 × 256 picture.

Published in:

Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '86.  (Volume:11 )

Date of Conference:

Apr 1986