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Design and VLSI implementation of a concurrent solver for N coupled least-squares fitting problems

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2 Author(s)
Deprettere, E.F. ; Delft University of Technology, Delft, Netherlands ; Jainandunsing, K.

In this paper we report on the design of a high-speed VLSI system-solver for solving a set of systems of linear equations in fixed point arithmetic, concurrently and in real-time. The systems originate from a speech coding least-squares fitting problem. They are strongly coupled and can be jointly solved, when properly nested, by a recursive algorithm. This algorithm has a computational complexity not greater than in case of a single system with multiple inhomogeneous terms. The algorithm exhibits sufficient structure and concurrency, which are exploited for its mapping on a fast VLSI system-solver. The mapping is carried out systematically by a strict-hierarchical temporal and local decomposition of the algorithm. Estimates show that the solver fits on 3 VLSI chips, each of size 6.5 × 6.5 mm2. Two of these are pipelined CORDICs, the third is a FIFO-type memory chip. The expected robust behavior of the design has been confirmed through simulations at the register level.

Published in:

Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '85.  (Volume:10 )

Date of Conference:

Apr 1985

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