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As design of integrated MicroElectroMechanical Systems (MEMS) matures, there is an increasing need for verification of MEMS layouts. This requires a mixed-domain LVS (layout-versus-schematic) methodology capable of extracting an integrated schematic from the mixed-domain layout and verifying it against the designed schematic. This paper reports on a prototype implementation of MEMS LVS and a MEMS extractor, which, in addition to reconstructing the extracted schematic also captures the domain-specific parasitics in the individual devices. This schematic is then used by a custom schematic-versus-schematic comparator to match connectivity of, various elements between the designed and extracted schematics. Finally, simulation of the extracted schematic also helps in capturing the true behavior of the system.
Date of Conference: 10-14 Nov. 2002