Performance evaluation of an input-queued ATM switch with internal speed-up and finite output queues

A switch model for ATM (asynchronous transfer mode) networks is analyzed. Its interconnection network is internally nonblocking and is provided with dedicated input and output queues, one per switch inlet and outlet. The switch operates with an internal speedup, which means that more than one packet per slot can be transferred from the input queues to each output queue by the interconnection network. A back-pressure mechanism that prevents output queue loss is also assumed. An analytical model for the evaluation of the switch performance is described assuming arbitrary output queue sizes and speed-up factors. Maximum throughput and average packet delay are evaluated. The analytical model accuracy is compared to computer simulation results, and the results obtained show very good agreement.<
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