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A single chip speech synthesizer using a switched-capacitor multiplier

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2 Author(s)
Gregorian, R. ; American Microsystems, Inc., Santa Clara, CA ; Amir, G.

A single chip speech synthesizer was designed using a switched-capacitor multiplier to implement the LPC algorithm. The chip contains the LPC-10 filter, 20 kbit ROM, all control logic, a three-pole switched-capacitor low-pass filter, and an audio amplifier capable of driving a speaker directly. The chip was fabricated in 5 μm CMOS technology and is 218 mils on the side.

Published in:

Acoustics, Speech and Signal Processing, IEEE Transactions on  (Volume:31 ,  Issue: 1 )

Date of Publication:

Feb 1983

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