By Topic

A memory compression scheme for modular arithmetic

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Chao Huang ; Lockheed Palo Alto Research Laboratory, Palo Alto, CA ; Taylor, F.J.

It has recently been shown that high-speed fixed-point digital filtering can be realized using modular arithmetic (viz., residue arithmetic). In these studies modular arithmetic is performed using table lookup methods. Here, precomputed modular operations are accessed from high-speed ROM's and/or RAM's. However, when large dynamic ranges are required, table size requirements can become unrealistically large. In this work we present a memory compression scheme which reduces the memory requirements imposed on modular arithmetic systems by as much as a factor of four. This dramatic memory savings is accomplished through the uncovering of some intrinsic symmetry properties found in modular arithmetic matrices.

Published in:

Acoustics, Speech and Signal Processing, IEEE Transactions on  (Volume:27 ,  Issue: 6 )