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A transform coding chip set for image compression

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3 Author(s)
Shah, I.A. ; North American Philips Corp., Briarcliff Manor, NY, USA ; Akiwumi-Assani, O. ; Johnson, B.C.

Two application-specific integrated circuits (ASICs) were designed to perform hierarchical transformation (S-transform processor) and Lempel-Ziv entropy coding (data compressor/decompressor). The chips can be used independently or together as a transform coding chip set for image compression. The algorithms and chip architectures of the transform codec (S-transform processor) and the entropy codec (data compressor/decompressor) are described

Published in:

Acoustics, Speech, and Signal Processing, 1990. ICASSP-90., 1990 International Conference on

Date of Conference:

3-6 Apr 1990