By Topic

Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

10 Author(s)
Kang-Yoon Lee ; Inter-Univ. Semicond. Res. Center, Seoul Nat. Univ., South Korea ; Seung-Wook Lee ; Yido Koo ; Hyoung-Ki Huh
more authors

This paper presents a full-CMOS transmitter and receiver for 2.0-GHz wide-band code division multiple access with direct conversion mixers and a DC-offset cancellation scheme. The direct conversion scheme combined with a multiphase sampling fractional-N prescaler alleviates the problems of the direct conversion transmitter and receiver. Digital gain control is merged into the baseband filters and variable-gain amplifiers to optimize the linearity of the system, reduce the noise, and improve the sensitivity. Variable-gain amplifiers with DC-offset cancellation loop eliminate the DC-offset in each stage. The chip implemented in 0.35-μm CMOS technology shows the experimental results of 6 dBm maximum output power with 38-dB adjacent channel power rejection ratio at 1.92 MHz, 50-dB dynamic range, and 363-mW power consumption in the transmitter. The receiver shows -115.4 dBm sensitivity, a 4.0-dB noise figure, and a dynamic range of 80-dB with 396-mW power consumption.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:38 ,  Issue: 1 )