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In this paper, we present results of our experiments in implementation of a widely used DSP primitive on a programmable SoC (system-on-a-chip) device. The DSP primitive is a 16-bit digital FIR filter which we implemented on the Triscend E5 CSoC® family. Experimental results show that by properly breaking the DSP task into hardware and software parts, one can achieve higher throughput compared to DSP processor implementations, while having more flexibility and less time-to-design compared to full-hardware realizations. The programmable SoC device facilitates rapid design-space exploration, which we employed to optimize our mixed hardware-software architecture. We compared our filter throughput to TI's announced figures of performance for its 16-bit family, and outperformed it by over 8%, although our processor (8032 compatible) was an 8-bit processor more suitable for control rather than DSP applications.