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Next generation CoreConnect™ processor local bus architecture

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2 Author(s)
R. Hofmann ; IBM Microelectron., Boca Raton, FL, USA ; B. Drerup

The CoreConnect™ next generation Processor Local Bus is a new, advanced technology bus architecture from IBM. This new bus architecture is substantially improved over previous generations, continuing its performance and feature leadership in high performance, open SOC buses. CoreConnect™ is targeted for high performance embedded applications in wired and wireless communications, networking, storage, and pervasive applications. This architecture provides SOC designers with a low power, high performance on-chip bus with server-class capabilities for single and multiple processors.

Published in:

ASIC/SOC Conference, 2002. 15th Annual IEEE International

Date of Conference:

25-28 Sept. 2002