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An oldest-first selection logic implementation for non-compacting issue queues [microprocessor power reduction]

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3 Author(s)
Buyuktosunoglu, A. ; Dept. of Electr. & Comput. Eng., Rochester Univ., NY, USA ; El-Moursy, A. ; Albonesi, D.H.

Microprocessor power dissipation is a growing concern, so much so that it threatens to limit future performance improvements. A major consumer of microprocessor power is the issue queue. Many microprocessors, such as the Compaq Alpha 21264 and IBM POWER4, use a compacting latch-based issue queue design which has the advantage of simplicity of design and verification. The disadvantage of this structure, however, is its high power dissipation. In this paper, we propose a new selection logic implementation in conjunction with a non-compacting issue queue. This scheme achieves comparable delays to the existing position-based selection approach used for compacting issue queues, yet results in far less power with a small performance loss.

Published in:

ASIC/SOC Conference, 2002. 15th Annual IEEE International

Date of Conference:

25-28 Sept. 2002