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Synchronization Techniques for Digital Networks

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2 Author(s)
H. Hartmann ; Tech. Univ. of Braunschweig, Germany ; E. Steiner

A fault-tolerant network clock regenerator (NCR) will be analyzed, which consists of two digital phase-locked loops (DPLL), and which allows a dynamical configuration control and thus is able to meet CCITT's Recommendations concerning permissible slip rates, frequency inaccuracy, as well as phase jitter and wander. The network synchronization scheme will conform to the master-slave principle, in the course of which the reference clock is derived from a national caesium atomic oscillator as master. The NCR's mentioned before serve as slaves which are equipped with highly precise voltage-controlled crystal oscillators and proportional-integral working DPLL's. The results of a field trial in the long-distance communications network of the "Deutsche Bundespost (FRG)" are given and interpreted by a Random Walk Model which describes the time interval errors appearing. For future digital exchanges, an NCR with intelligent configuration control is introduced, which consists of two microprocessor-controlled digital phase-locked loops (MCDPLL) and which has comparable time stability characteristics as the double-DPLL mentioned above at half the circuit volume. Finally, the dominant advantages are shown which result from synchronizing broad-band services by intelligent NCR techniques.

Published in:

IEEE Journal on Selected Areas in Communications  (Volume:4 ,  Issue: 4 )