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Solder joints between ceramic chip carriers (CCC's) and printed wiring boards (PWB's) are likely to experience large thermal strains during operation in the field. Strains applied during accelerated temperature cycling have been shown to cause cracks in the solder and electrical failures (opens). The forces and moments exerted on the solder (and the resulting displacements) arc inferred from strain gage measurements of the in-plane deformation and bending of the PWB and the CCC. It is found that below room temperature, most of the expansion mismatch is accommodated by "bi-metallic strip" type bending of the PWB and the CCC. The change in bending during a temperature change from - 25°C to +35°C is consistent with the classical bi-metallic strip equation, given material properties from the literature. Above room temperature most of the mismatch is accommodated by shear in the solder. Upon repeated temperature cycling, there is a repeatable stress-strain hysteresis, which is attributed to plastic deformation in the solder. This deformation is lower for staggered tin pillar joints than for in-line 60/40 solder post joints. It is lower still when the PWB in-plane expansivity is constrained by copperclad invar (CCI) layers included in the stack-up. Using mechanical equilibrium conditions, we can calculate the force per joint and solder shear displacement. The force represents up to 35 percent of the ultimate force calculated from the ultimate shear strength.