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Design and analysis of a scalable cache coherence scheme based on clocks and timestamps

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2 Author(s)
Min, S.L. ; Dept. of Comput. Eng., Pusan Nat. Univ., South Korea ; Baer, Jean-Loup

A timestamp-based software-assisted cache coherence scheme that does not require any global communication to enforce the coherence of multiple private caches is proposed. It is intended for shared memory multiprocessors. The scheme is based on a compile-time marking of references and a hardware-based local incoherence detection scheme. The possible incoherence of a cache entry is detected and the associated entry is implicitly invalidated by comparing a clock (related to program flow) and a timestamp (related to the time of update in the cache). Results of a performance comparison, which is based on a trace-driven simulation using actual traces. between the proposed timestamp-based scheme and other software-assisted schemes indicate that the proposed scheme performs significantly better than previous software-assisted schemes, especially when the processors are carefully scheduled so as to maximize the reuse of cache contents. This scheme requires neither a shared resource nor global communication and is, therefore, scalable up to a large number of processors

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Parallel and Distributed Systems, IEEE Transactions on  (Volume:3 ,  Issue: 1 )