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A review of the progress in the field of Josephson digital devices and circuits is presented. Since the first report of measurements on the switching speed of a Josephson junction in 1966, a large variety of circuits have been developed, with one having a delay of only 13 ps. With miniaturization beyond the present 2.5-mu m linewidths, this remarkable speed probably can be exceeded. It is pointed out that the high speed is combined with very low power so that the high packing density needed to make use of the speed is possible. The paper reviews the Josephson junction and its incorporation into logic gates and memory cells. References are given to larger systems using these elements.