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The potential of p-well GaAs MESFET technology for precision integrated circuits

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2 Author(s)
Canfield, P.C. ; Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA ; Allstot, D.J.

A p-well GaAs MESFET technology that totally eliminates sidegating between adjacent MESFETs is described. Both the small-signal output conductance (gds) frequency dispersion, and the drain current transients of the p-well GaAs MESFET are reduced by more than an order of magnitude as compared with a conventional GaAs MESFET. The test chip used to develop the p-well MESFET technology is discussed. It includes an array of sidegate structures to test the importance of the various p-type layers and the importance of connecting the p-well to the source. Several analog building blocks and circuits are implemented, including fully-differential self-bootstrapped gain stages, transimpedance amplifiers with metal-semiconductor-metal photodetectors, precision DC voltage references, and other operational amplifiers

Published in:

Circuits and Systems, 1990., IEEE International Symposium on

Date of Conference:

1-3 May 1990