An algorithm for the state reduction of incompletely specified sequential machines is presented. The heuristic method does not need to generate any complete set of compatibles. Starting from the set of internal states in the given symbolic description of the finite state machine (FSM), the application of a sequence of transformations results in a description with a smaller number of states. Experimental results for a wide set of machines are included which prove the superiority of the algorithm
Published in:
Circuits and Systems, 1990., IEEE International Symposium on
Date of Conference: 1-3 May 1990