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A fast algorithm for the generation of fault dictionary of linear analog circuits using adjoint network approach

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2 Author(s)
Prasad, V.C. ; Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India ; Pinjala, S.N.R.

A method for the generation of a fault dictionary of a linear analog circuit is presented. The method is based on the well-known adjoined network concept. For an (n+1) node network and for an order of n2 faults, the method is of O(n 3) time complexity. A minimum of O(n4) is required, showing that the method is extremely fast. Using n processors, the method takes O(1) time on a single instruction multiple-data shared memory parallel computer

Published in:
Circuits and Systems, 1990., IEEE International Symposium on

Date of Conference: 1-3 May 1990

Page(s):
37 - 40 vol.1
Meeting Date :
01 May 1990-03 May 1990
INSPEC Accession Number:
3832466
Conference Location :
New Orleans, LA
Digital Object Identifier :
10.1109/ISCAS.1990.111907
Product Type:
Conference Publications

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