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Integration of instruction set simulators into SystemC high level models

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4 Author(s)
I. Oussorov ; Infineon Technol. AG, Munich, Germany ; W. Raab ; U. Hachmann ; A. Kravtsov

This paper discusses the integration of instruction set simulators (ISS) for processor cores into highlevel system models. The approaches to providing data communication between high level modules and ISS are addressed as well as the synchronization between these parts.

Published in:

Digital System Design, 2002. Proceedings. Euromicro Symposium on

Date of Conference: