By Topic

Linear array processors with multiple access modes memory for real-time image processing

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Rabah, H. ; LIEN, Univ. Henri Poincare, Vandoeuvre-les-Nancy, France ; Mathias, H. ; Mozef, E. ; Torres, D.
more authors

This paper presents the Linear Array Processors with Multiple Access Modes Memory system (LAPMAM), an efficient mono dimensional parallel architecture for real-time image processing. This architecture is composed of n processors and n2 memory modules. These memory modules have multiple access modes: RAM, FIFO, normal CAM and interactive CAM modes. They are associated with a linear array of VLIW processors, which are interconnected through a communication network. The practical working of the architecture is explained using the example of a parallel labeling algorithm. A hardware simulation of a LAPMAM prototype has been carried out to test its performance in low and intermediate level image processing. The simulation results of the VHDL model are presented.

Published in:

Circuits and Systems, 2002. APCCAS '02. 2002 Asia-Pacific Conference on  (Volume:1 )

Date of Conference: