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This paper presents the Linear Array Processors with Multiple Access Modes Memory system (LAPMAM), an efficient mono dimensional parallel architecture for real-time image processing. This architecture is composed of n processors and n2 memory modules. These memory modules have multiple access modes: RAM, FIFO, normal CAM and interactive CAM modes. They are associated with a linear array of VLIW processors, which are interconnected through a communication network. The practical working of the architecture is explained using the example of a parallel labeling algorithm. A hardware simulation of a LAPMAM prototype has been carried out to test its performance in low and intermediate level image processing. The simulation results of the VHDL model are presented.