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Using on-chip configurable logic to reduce embedded system software energy

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4 Author(s)
Stitt, G. ; Dept. of Comput. Sci. & Eng., California Univ., Riverside, CA, USA ; Grattan, B. ; Villarreal, J. ; Vahid, F.

We examine the energy savings possible by re-mapping critical software loops from a microprocessor to configurable logic appearing on the same-chip in commodity chips now commercially available. That logic is typically intended to implement peripherals and coprocessors without increasing chip count-but we show that reduced software energy is an additional benefit, making such chips even more useful. We find critical software loops and re-implement them in the configurable logic such that a repeating software task completes sooner, allowing us to put the system in a low-power state for longer periods, thus reducing energy. We use simulations and estimations for a hypothetical device having a 32-bit MIPS processor plus configurable logic, yielding energy savings of 25%, increasing to 39% assuming voltage scaling. We physically measured several examples running on two commercial single-chip devices having an 8-bit 8051 microprocessor plus configurable logic and a 32-bit ARM microprocessor with configurable logic, with energy savings of 71% and 53% respectively, increasing to an estimated 89% and 75% assuming voltage scaling.

Published in:

Field-Programmable Custom Computing Machines, 2002. Proceedings. 10th Annual IEEE Symposium on

Date of Conference:

2002

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