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Integrated power transistor in 0.18-μm CMOS technology for RF system-on-chip applications

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6 Author(s)
Heng-Ming Hsu ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Jiong-Guang Su ; Chih-Wei Chen ; Tang, D.D.
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A novel design and performance of a power MOS transistor for RF system-on-chip applications are reported. The power MOS transistor with high breakdown voltage is integrated into 0.18-μm CMOS technology with only one additional mask. By an optimized design considering all aspects of DC and RF performances, a power MOS transistor with 16-GHz cutoff frequency and 24-GHz maximum oscillation frequency has been demonstrated. In addition, the power gain is 12 dB at 2.4 GHz with power-added efficiency of 50%. In this study, the device architectures that include drain engineering, substrate engineering, and gate scaling are investigated comprehensively.

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Microwave Theory and Techniques, IEEE Transactions on  (Volume:50 ,  Issue: 12 )