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Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications

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5 Author(s)
X. F. Gao ; Sch. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA ; J. J. Liou ; J. Bernier ; G. Croft
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Electrostatic discharge (ESD) is a critical reliability concern for microchips. This paper presents a comprehensive computer-aided design tool for ESD applications. Specifically, the authors develop an improved and robust MOS model and implement such a model into the industry standard Cadence SPICE for ESD circuit simulation. The key components relevant to ESD in the MOS model are studied and the implementation procedure is discussed. Experimental data measured from the human body model tester are included in support of the model.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:21 ,  Issue: 12 )