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Piezoresistive accelerometers for MCM package

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4 Author(s)
J. A. Plaza ; Centro Nacional de Microelectron., CSIC, Madrid, Spain ; A. Collado ; E. Cabruja ; J. Esteve

Describes the first steps carried out for the integration of piezoresistive accelerometers in an MCM-D (D-type multichip modules with flip-chip interconnection) package. The bulk micromachined accelerometer technology and its modification to comply with MCM-D packaging technology requirements are presented. The accelerometer technology is based on BESOI (Bond and Etch Back Silicon-On-Insulator) wafers. The main characteristic of this technology is the use of the buried silicon oxide layer as an etch stop and as a sacrificial layer. In addition, over-range protection and self-test systems are defined without any additional photolithographic step or process. The flip chip attachment requires solderable metals in the bump pads. In addition, a sealing ring has been defined around the movable parts of the sensors to protect them from the underfill used during the final packaging process. Cantilever beam accelerometers with a self-test system are presented as example of the combined technology. The design, simulation, fabrication and characterization of the devices prior to the MCM-D packaging are presented as well.

Published in:

Journal of Microelectromechanical Systems  (Volume:11 ,  Issue: 6 )