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Line Equalizer for a Digital Subscriber Loop Employing Switched Capacitor Technology

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4 Author(s)
T. Suzuki ; Central Research Laboratory, Hitachi Ltd., Kokubunji, Tokyo, Japan ; H. Takatori ; M. Ogawa ; K. Tomooka

A new line equalizer system for time compression burstmode digital suhscriber loop transmission that can equalize a line with multiple bridged taps (BT's) is developed. Using the developed equalizer, up to 5 km (0.4 mmφ) line length and four BT connections can be equalized at a data rate of 80 kbits/s in each direction. The equalizer is composed of a variable gain \surd {f} step equilizer, a decision feedback automatic equalizer, and a newly developed wave difference method (WDM) timing extraction PLL. In order to fabricate the whole circuit on a single-chip LSI, most of the analog portion is organized using; switched capacitor technology. In this paper, the system design concept, circuit configuration, and results of simulations and experiiments are described.

Published in:

IEEE Transactions on Communications  (Volume:30 ,  Issue: 9 )