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The multistep single-path multiplier-free conversion scheme proposed by Fettweis satisfies the requirement of robustness and seems to be attractive for transmultiplexers. This paper describes the implementation of a transmultiplexer based on this method using digital signal processors (DSP's). Since most of the currently available or proposed DSP's have sum-of -products type arithmetic units with fixed coefficient wordlengths and since this is not the most favorable approach for implementing wave digital filters (WDF's), a novel DSP will be proposed which is advantageous for WDF's and other more sophisticated digital signal processing algorithms. This DSP makes the multistep single-path multiplier-free conversion scheme a viable alternative to other schemes, also with respect to hardware efficiency and power consumption. The importance of using various simulation programs (in the frequency and the time domain as well as in real time) for supporting the design of the transmultiplexer will be stressed.