A discretely variable slope delta modulation (DVSD) codec is described, which is suitable for integrated circuit realization. The step size is varied by a pulse number modulation method that does not require a precision digital-to-analog conversion circuit. An adaptation algorithm is discussed, taking into consideration the effect of transmission errors. The quantizer and integrator portion has been fabricated on a monolithic chip using MOS technology. Results obtained from an experimental 32 kbit/s codec demonstrate its excellent performance.
Published in:
Communications, IEEE Transactions on
(Volume:29
,
Issue:
2
)
Date of Publication:
Feb 1981
- Page(s):
-
168
-
173
- ISSN :
-
0090-6778
- Digital Object Identifier :
-
10.1109/TCOM.1981.1094979
- Product Type:
-
Journals & Magazines
- Date of Current Version :
-
06 January 2003
- Issue Date :
-
Feb 1981
- Sponsored by :
-
IEEE Communications Society