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Realization of ADM Arithmetic Signal Processors

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3 Author(s)
LoCicero, Joseph L. ; Illinois Inst of Tech., Chicago, IL ; Schilling, D.L. ; Garodnick, J.

The purpose of this paper is to show that signals which are adaptive delta modulation (ADM) encoded can be arithmetically processed directly, without first decoding or converting to pulse code modulation (PCM) format. By operating on the serial DM bit streams, the sum, difference and product can be obtained in PCM and ADM format. Employing a four-term, non-recursive, averaging filter after the processors, we show that, for constant inputs, the signal-to-noise ratio (SNR) of the DM devices is exactly the same as that of their PCM counterparts. Although we have used the Song audio mode ADM [1] in the realization of our arithmetic processors, the designs are general enough to be applied to a large class of digital ADMs. To keep all systems practically realizable, we only employ operations which can be constructed with standard digital hardware, that is, adder, delays, hard-wired scalars and common logic circuits. Consequently, all our ADM devices can be manufactured with large scale integration where the distinct advantage is low cost and high reliability.

Published in:

Communications, IEEE Transactions on  (Volume:27 ,  Issue: 8 )