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The differential amplifier presented in this paper is based on the principle of the constant sum of the gate-source voltages, which assures, in a first-order analysis, the linearization of the circuit. The new idea is to cancel the nonlinearities introduced by the second-order effects such as short channel effect, mobility degradation and bulk effect by using a parallel connection of two complementary excited differential stages. The circuit is implemented in 0.35 μm CMOS technology on a die area of 20 μ/35 μ. The SPICE simulation using BSIM3v3 model and based on the mentioned technology parameters validates the estimated theoretical results about the linearity (a linearity error of 0.5% for an extended input range of 1 V).