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An embedded 0.8 V/480 μW 6b/22 MHz flash ADC in 0.13-μm digital CMOS process using a nonlinear double interpolation technique

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2 Author(s)
Lin, J. ; Texas Instrum. Inc., Dallas, TX, USA ; Haroun, B.

For high-data-rate wireless communication, low-voltage baseband converters integrated with DSP in deep submicrometer processes are area- and power-efficient. Through careful architecture selections and circuit techniques, this paper demonstrates a low-voltage (0.8 V), low-power (480 μW), 6-b/22-MHz flash-interpolation ADC which occupies 0.3 mm2 and achieves 33 dB SNDR and 47 dB SFDR. The power efficiency of this converter is 0.6 pJ/conv-step which compares favorably with all published results. We also introduce a nonlinear double interpolation technique that enables the use of a 0.13-μm standard digital CMOS process without special resistors.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:37 ,  Issue: 12 )

Date of Publication:

Dec 2002

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