Scheduled System Maintenance:
Some services will be unavailable Sunday, March 29th through Monday, March 30th. We apologize for the inconvenience.
By Topic

Design of very low sensitivity low-pass switched-capacitor ladder filters

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
2 Author(s)

Design techniques are described for very low sensitivity low-pass switched-capacitor (SC) ladder filters whose worst-case sensitivities become zero at some specific frequency points. The proposed techniques are based on time sharing of the circuit elements and on implementing parasitics-compensated SC building blocks. Two design methods are proposed: an approximate design for LDI all-pole low-pass SC ladders and an exact design for bilinear elliptic low-pass SC ladders. The approximation error in the former is practically negligible by suitably choosing the clock frequency. The advantage of this approach is that a very low sensitivity property is achieved together with a small capacitance spread, a small total capacitance, and a small operational-amplifier count.

Published in:

Circuits and Systems, IEEE Transactions on  (Volume:34 ,  Issue: 5 )