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New VLSI systolic array design for real-time digital signal processing

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1 Author(s)

The well-known advantages of pipelines systolic array architecture is applied for implementation of a second-order recursive digital filter. The proposed structure achieves five-fold increase in system throughput over standard techniques, and two-fold increase over usual systolic approaches. In this letter, the data flow operation and the basic cell implementation for this design are presented.

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Circuits and Systems, IEEE Transactions on  (Volume:33 ,  Issue: 6 )