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VLSI implementation of two-dimensional digital filters via two-dimensional filter chips

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2 Author(s)

In this paper we consider the realization of an arbitrary two-dimensional (2-D) rational transfer function, which represents an infinite impulse response (IIR) 2-D filter, in terms of low-order 2-D polynomials. These low-order polynomials are implemented via a bit-sliced chip, and are used as standard building blocks for the implementation of the general 2-D digital filter. Different general realization methods are considered and are modified in order to incorporate the standard 2-D chips. The resulting structures have reduced complexity and they exhibit a high degree of regularity and modularity. Furthermore, the number of 2-D low-order filter chips required for the implementation of the given filter is substantially reduced, compared to the number of 1-D chips required by regular general implementations.

Published in:

Circuits and Systems, IEEE Transactions on  (Volume:33 ,  Issue: 2 )

Date of Publication:

Feb 1986

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