Referenced Items are not available for this document.
A study of VLSI arrays that implement single-input singleoutput linear time-invariant digital filters is initiated in this paper. The arrays are restricted to be comprised of several similar processing elements in a linear configuration with only nearest neighbor links. The requirement of pipelineability in the resulting circuits is also imposed. A general framework is developed for the design of such arrays when each processing element is assumed to have a certain model with a single state variable. Several existing canonical form realizations are shown to be obtainable as special cases of the array configurations developed in this paper.
Published in:
Circuits and Systems, IEEE Transactions on
(Volume:32
,
Issue:
11
)
Date of Publication: Nov 1985
- Page(s):
- 1105 - 1118
- ISSN :
- 0098-4094
- Digital Object Identifier :
- 10.1109/TCS.1985.1085645
- Date of Current Version :
- 06 January 2003
- Issue Date :
- Nov 1985
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