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Design of parasitic-insensitive bilinear-transformed admittance-scaled (BITAS) SC ladder filters

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2 Author(s)

A new method for the design of parasitic-insensitive switched-capacitor (SC) ladder filters is described. The filters are derived from analogLCprototypes utilizing the bilinearz-transform. The method is based on the signal-flowgraph (SFG) concept in the discrete-time domain. The resulting networks preserve the frequency response and low sensitivity properties of the equivalent continuous-timeLCfilters.

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Circuits and Systems, IEEE Transactions on  (Volume:30 ,  Issue: 12 )