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Described below are the primary primary design considerations, fabrication techniques, and measured performance bounds on a monolithic silicon photodetector/amplifier integrated circuit. The IC was designed for utilization in short- to medium-haul fiber-optic data links, performing signal processing, and isolation functions at data ratesup to 500 Mbit/s. Consisting of a p-i-n photodiode integrated monolithically with a multistage amplifier/limiter circuit, the device was fabricated with planar high-frequency bipolar transistors commonly used for ECL logic circuits. Circuit features include dc coupling, wide-band operation, and capability of driving 50 Ω at the output to 0.5 V (peak-peak). Measured device yield is an impressive 35 percent, indicating amenability to production constraints. Complimenting the IC design is a novel and practical optical coupling/packaging technique that renders the packaged device quite compact and compatible with accepted high-speed electronic layout techniques.