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The fabrication and operation of high-density (0.25 × 106bit/in2) nondestructive readout (NDRO) memory elements are described. The high density is made possible by coupled films and Permalloy keeper. The NDRO is made possible by multiple-pulse WRITE or hard-direction bias field. Typical performance parameters are mA, mA, and μV/3 ns. The small signal is detectable by multiple-pulse READ. When such memory elements are to be fabricated with peripheral circuits on the same Si chip, a self-contained chip will be obtained. Such chips could enjoy the same advantages as semiconductor memory chips such as few leads, modularity, amenability to bit organization, and possibility for error-correction, but would be capable of higher storage density due to simpler planar configuration.