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A high-rate Fastbus silicon strip readout system

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18 Author(s)
Swoboda, C. ; Fermi Nat. Accel. Lab., Batavia, IL, USA ; Barsotti, E. ; Bowden, M. ; Christian, D.
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A synchronous silicon strip readout system capable of zero dead-time readout at average trigger rates in excess of 1 MHz is described. The system is implemented in Fastbus, uses pipelining techniques, and includes point-to-point fiberoptic data links to transmit detector digital data. Semicustom ASIC (application-specific integrated circuit) chips are used to amplify, discriminate, and logically combine track data before encoding. The overall system, each major Fastbus module, and the functional aspects of the ASIC chips are described

Published in:

Nuclear Science, IEEE Transactions on  (Volume:37 ,  Issue: 2 )

Date of Publication:

Apr 1990

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