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Galvanic overlay fabrication for bubble memory chips on 2-in garnets

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1 Author(s)
B. Littwin ; Siemens AG, Components Division, Munich, Germany.

Two-inch-diameter wafers containing 56 bubble memory chips of 16 kbit capacity each were fabricated by electroplating. A three-mask level design with a thin-film detector and a minimum feature of 1.5 μm were used. The NiFe films, plated out of a NiFe-sulfamate or a NiFe-citrate bath, had a coercivity of 1.5 Oe, a magnetostriction of 0 to -1 × 10-6a relative magnetoresistance of 1.8 percent at maximum and a resistivity of 28 μΩcm. A thickness uniformity of ± 2.5 percent was achieved on a Permalloy plating base of 30 nm by balancing the plating conditions. Statistical defects appearing in the transport pattern are significantly reduced by the preplating of a thin Au underlayer into the photoresist windows before the deposition of the Permalloy. The resistance of electroplated Au conductors scattered by ± 8 percent around the mean value and a similar scattering in the dc burn-out current was observed. For reasons of comparison, 16-kbit chips were fabricated using only subtractive techniques. In these experiments Ti-Pd-Au and Ni-Fe layers of the same thickness as the plated ones were evaporated or deposited by sputtering and the microstructures were delineated by ion milling. Comparing the chips fabricated by both technologies, we found no differences in the transport characteristics and the bias-field margins at a drive-field frequency of 100 kHz and for up to 108propagation steps.

Published in:

IEEE Transactions on Magnetics  (Volume:14 ,  Issue: 3 )