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Clock synchronization in MAFT

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4 Author(s)
Thambidurai, P. ; Allied-Signal Aerosp. Co., Columbia, MD, USA ; Finn, A.M. ; Kieckhafer, R.M. ; Walter, C.J.

The steady-state clock synchronization algorithm of MAFT (multicomputer architecture for fault tolerance), an extremely reliable system for real-time applications, is discussed. The synchronization algorithm has been implemented in hardware and a system prototype constructed. The algorithm uses an interactive convergence approach, based on synchronized rounds of message transmission. The authors derive the maximum skew between nonfaulty clocks in terms of basic system parameters. The problem of detecting clock faults is also addressed, with attention to the minimum amount of synchronization error guaranteed to be unambiguously detected. The authors discuss the various practicalities which arise in the implementation of the algorithm as an integrated part of the whole system. Relationships between the synchronization subsystem and the total system are discussed.<>

Published in:

Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium on

Date of Conference:

21-23 June 1989