Design and performance of phase-lock circuits capable of near-optimum performance over a wide range of input signal and noise levels

Phase locked loops (PLLs) provide an efficient method for detection and tracking of narrow-band signals in the presence of wide-band noise. This paper explains how minimum-rms-error loops may be designed if the input-signal level, input-noise level, and a specification for transient performance are given. However, the system performance of PLLs departs rapidly from the best obtainable performance if either the signal or the noise levels are different from the design levels, and if no compensating changes are made in the PLL. A marked improvement results if the total input power is held constant, regardless of signal or noise levels. It will be demonstrated that a fixed-component loop preceded by a bandpass limiter yields near-optimum performance over a wide range of input signal and noise levels. The following topics are discussed: 1. An outline of the theoretical design of minimmum rms-error, PLLs when input-signal level, input-noise level, and a specification for transient error are given. 2. The effects of different input levels of signal and noise: a. On a system having a fixed-component loop that is optimum only for an original set of levels. b. On a system in which loop components maintain optimum performance when the new levels are given. 3. Characteristics of a bandpass limiter. 4. A comparison of the effect of different signal and noise levels: a. On a loop using a fixed filter preceded by an automatic gain control (AGC) system that holds the signal level constant. b. On a fixed-filter loop preceded by a bandpass limiter. c. On a variable-filter loop continually adjusted to be optimum. 5. Experimental verification of the fixed-component loop preceded by a bandpass limiter.